The acceptance of compiler-developed integrated circuits, often referred to as application specific integrated circuits (ASICs) or standard cells, developed an increased need for improved test techniques for the large variety of circuits produced by those methods. Improved semiconductor manufacturing procedures provided increased complexity semiconductor devices, while compiler design techniques provided a means to rapidly develop designs of many different semiconductor devices. The resulting proliferation of complex ASIC semiconductor devices increased the need for test methods that were flexible, and that could be compiled concurrently with an ASIC design. One technique, generally referred to as built-in self-test (BIST), placed circuitry on the ASIC device to accomplish testing of the ASIC device. BIST became increasingly important to ASIC devices that included blocks of static random access memory (SRAM) that were embedded on the ASIC device.
There are essentially three elements associated with the BIST function: 1) the BIST controller, 2) the data generator, and 3) the data analyzer. The BIST controller provides synchronization and control signals for the BIST operation. The data generator provides a stimulus to the circuit (ASIC) under test. Finally, the data analyzer provides a mechanism for compacting the response from the circuit under test to form a result.
A data analyzer typically performs two types of data analysis: 1) comparison analysis, and 2) signature analysis. In comparison analysis, an output stream from the circuit under test is compared with an expected data stream. Whenever a difference is found between the two data streams, an error is flagged and is held in the data analyzer. At the end of the test the contents of the data analyzer can be examined to locate the fault. An advantage of comparison analysis is that fault location can be easily performed. However, comparison analysis has a disadvantage that a failure in the comparison analysis circuitry may prevent faults from being detected.
In signature analysis, an output from the circuit under test is combined with the contents of the data analyzer using a linear feedback shift register (LFSR). The LFSR ensures that the response and the time form part of the signature. At the end of the test, the resulting signature in the LFSR's can be scanned out and compared with a known good signature. Signature analysis has the advantage that its tests all the components of the BIST as well as the circuit under test. However, disadvantages of signature analysis are that the location of the fault cannot be determined, and that there is a small probability that a faulty circuit may not be recognized because of aliasing of the signature.
Prior art BIST circuitry includes circuitry for performing either comparison analysis or signature analysis, but not both. The primary reason may be that :incorporating both types of analysis within an ASIC would consume too much circuitry. However, each type of analysis has its disadvantages as aforedescribed. As a result, in order to perform a complete and thorough testing of an ASIC both comparison analysis and signature analysis are needed.
Hence, there exists a need to provide an improved data analyzer for performing both comparison analysis and signature analysis while using minimal circuitry thereby performing complete self test of an ASIC.